(1) PiDFA: A Practical Multi-stride Regular Expression Matching Engine Based On FPGA, ISCC, 2017, 第 11 作者
(2) RICS-DFA: A Space and Time Efficient Signature Matching Algorithm with Reduced Input Character Set, Concurrency and Computation: Practice and Experience, 2016, 第 11 作者
(3) Acceleration of RSA Processes Based on Hybrid ARM-FPGA Cluster, IPCCC, 2016, 第 11 作者
(4) A pipelined market data processing architecture to overcome financial data dependency, ICC, 2016, 第 11 作者
(5) 基于差分压缩的大规模日志压缩系统, 通信学报, 2015, 第 11 作者
(6) A fast regular expression matching engine for NIDS applying prediction scheme, ISCC, 2014, 第 1 作者
(7) RICS-DFA: Reduced Input Character Set DFA for Memory-efficient Regular Expression Matching,International Conference on Applications and Techniques in Information Security, ATIS, 2014, 第 11 作者
(8) RSA Encryption/Decryption Implementation Based on Zedboard, ISCTCS, 2014, 第 11 作者
(9) An Efficient Sparse Matrix Format for Accelerating Regular Expression Matching on FPGAs, Security and Communication Networks, 2014, 第 1 作者
(10) ClusterFA: a memory-efficient DFA structure for network intrusion detection, AISACCS, 2012, 第 1 作者